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1. general description the 74cbtlvd3244 is a dual 4-pole, single-t hrow bus switch. the device features two output enable inputs (noe ) that each control four switch channels. the switches are disabled when the associated noe input is high. schmitt trigger action at control inputs makes the circuit tolerant of slower input rise and fall times. this device is fully specified for partial power-down applications using i off . the i off circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. features and benefits ? supply voltage range from 3.0 v to 3.6 v ? high noise immunity ? complies with jedec standard: ? jesd8-b/jesd36 (3.0 v to 3.6 v) ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? cdm aec-q100-011 revision b exceeds 1000 v ? 5 ? switch connection between two ports ? rail to rail switching on data i/o ports ? cmos low power consumption ? latch-up performance exceeds 250 ma per jesd78b class i level a ? i off circuitry provides partial power-down mode operation ? multiple package options ? specified from ? 40 ? cto+85 ? c and ? 40 ? cto+125 ? c 74cbtlvd3244 8-bit level-shifting bus swit ch with 4-bit output enables rev. 1 ? 15 july 2011 product data sheet
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 2 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 3. ordering information [1] also known as qsop20 package 4. functional diagram table 1. ordering information type number package temperature range name description version 74CBTLVD3244DS ? 40 ? c to +125 ? c ssop20 [1] plastic shrink small outline package; 20 leads; body width 3.9 mm; lead pitch 0.635 mm sot724-1 74cbtlvd3244pw ? 40 ? c to +125 ? c tssop20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm sot360-1 74cbtlvd3244bq ? 40 ? c to +125 ? c dhvqfn20 plastic dual-in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 ? 4.5 ? 0.85 mm sot764-1 fig 1. logic symbol 001aan303 2 1 18 1b1 1a1 1oe 4 16 1b2 1a2 6 14 1b3 1a3 8 12 1b4 1a4 11 19 9 2b1 2a1 2oe 13 7 2b2 2a2 15 5 2b3 2a3 17 3 2b4 2a4
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 3 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 5. pinning information 5.1 pinning fig 2. logic diagram 001aan196 1a1 1a4 1b1 1b4 1oe 2a1 2a4 2b1 2b4 2oe fig 3. pin configuration for tssop20 (sot360-1) f ig 4. pin configuration for ssop20 (sot724-1) aaa-000025 v cc 2oe 1 2 3 4 5 6 7 8 9 10 1b1 2a4 1b2 2a3 1b3 2a2 1b4 2a1 1oe 1a1 2b4 1a2 2b3 1a3 2b2 1a4 2b1 gnd 74cbtlvd3244 20 19 18 17 16 15 14 13 12 11 v cc 20 2oe 19 1b1 18 2a4 17 1b2 16 2a3 15 1b3 14 2a2 13 1b4 12 2a1 11 11oe 21a1 32b4 41a2 52b3 61a3 72b2 81a4 92b1 10 gnd 74cbtlvd3244 aaa-000026
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 4 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 5.2 pin description 6. functional description [1] h = high voltage level; l = low voltage level; z = high-impedance off-state. (1) this is not a supply pin, the substrat e is attached to this pad using conductive die attach material. there is no electrical or mechanical requirement to solder this pad however if it is so ldered the solder land should remain floating or be connected to gnd. fig 5. pin configuration for dhvqfn20 (sot764-1) 2oe 1b1 2a4 1b2 2a3 1b3 2a2 1b4 v cc 1oe gnd 2a1 transparent top view terminal 1 index area 74cbtlvd3244 19 18 17 16 15 14 13 12 9 8 7 6 5 4 3 21a1 2b4 1a2 2b3 1a3 2b2 1a4 2b1 11 10 20 1 gnd (1) aaa-000027 table 2. pin description symbol pin description 1oe , 2oe 1, 19 output enable input (active low) 1a1 to 1a4 2, 4, 6, 8 data input/output (a port) 2b1 to 2b4 9, 7, 5, 3 data input/output (a port) gnd 10 ground (0 v) 2a1 to 2a4 11, 13, 15, 17 da ta input/output (b port) 1b1 to 1b4 18, 16, 14, 12 da ta input/output (b port) v cc 20 positive supply voltage table 3. function selection [1] input input/output noe nan, nbn lnan = nbn hz
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 5 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 7. limiting values [1] the minimum input and output voltage ratings may be exceed ed if the input and output current ratings are observed. [2] for ssop20 and tssop20 packages: above 60 ? c the value of p tot derates linearly at 5.5 mw/k. for dhvqfn20 packages: above 60 ? c the value of p tot derates linearly at 4.5 mw/k. 8. recommended operating conditions [1] applies to control signal levels. 9. static characteristics table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +4.6 v v i input voltage [1] ? 0.5 +4.6 v v sw switch voltage enable and disable mode [1] ? 0.5 v cc + 0.5 v i ik input clamping current v i/o < ? 0.5 v ? 50 - ma i sk switch clamping current v i < ? 0.5 v ? 50 - ma i sw switch current v sw = 0 v to v cc - ? 128 ma i cc supply current - +100 ma i gnd ground current ? 100 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? cto+125? c [2] - 500 mw table 5. recommended operating conditions symbol parameter conditions min max unit v cc supply voltage 3.0 3.6 v v i input voltage 0 3.6 v v sw switch voltage enable and disable mode 0 v cc v t amb ambient temperature ? 40 +125 ?c ? t/ ? v input transition rise and fall rate v cc = 3.0 v to 3.6 v [1] 0 200 ns/v table 6. static characteristics at recommended operating conditions voltages are referenced to gnd (ground = 0 v). symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max v ih high-level input voltage v cc = 3.0 v to 3.6 v 2.0 - - 2.0 - v v il low-level input voltage v cc = 3.0 v to 3.6 v - - 0.9 - 0.9 v i i input leakage current pin noe ; v i = gnd to v cc ; v cc =3.6v -- ? 1- ? 20 ? a v pass pass voltage v i = v cc ; see figure 8 to figure 12 --- - -v
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 6 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables [1] all typical values are measured at t amb =25 ? c. [2] one input at 3 v, other inputs at v cc or gnd. 9.1 test circuits i s(off) off-state leakage current v cc = 3.6 v; see figure 6 -- ? 1- ? 20 ? a i s(on) on-state leakage current v cc = 3.6 v; see figure 7 -- ? 1- ? 20 ? a i off power-off leakage current v i or v o = 0 v to 3.6 v; v cc =0v -- ? 10 - ? 50 ? a i cc supply current v i = v cc ; i o = 0 a; v cc =3.6v; v sw =gndorv cc --20 - 50 ? a v i = gnd; i o = 0 a; v cc =3.6v; v sw =gndorv cc - - 100 - 150 ? a ? i cc additional supply current pin noe ; v i =v cc ? 0.6 v; v sw =gndorv cc ; v cc =3.6v [2] - - 300 - 2000 ? a c i input capacitance pin noe ; v cc = 3.3 v; v i = 0 v to 3.3 v -0.9- - -pf c s(off) off-state capacitance v cc = 3.3 v; v i = 0 v to 3.3 v - 2.5 - - - pf c s(on) on-state capacitance v cc = 3.3 v; v i = 0 v to 3.3 v - 9.0 - - - pf table 6. static characteristics ?continued at recommended operating conditions voltages are referenced to gnd (ground = 0 v). symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max v i = v cc or gnd and v o = gnd or v cc .v i = v cc or gnd and v o = open circuit. fig 6. test circuit for measuring off-state leakage current (one switch) fig 7. test circuit for measuring on-state leakage current (one switch) 001aam032 nbn noe v ih nan gnd v cc v l v o i s a i s a 001aam033 nan noe v il nbn gnd v cc v l v o i s a
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 7 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 9.2 typical pass voltage graphs fig 8. pass voltage versus supply voltage; t amb = 125 ?c (typical) fig 9. pass voltage versus supply voltage; t amb =85 ? c (typical) v cc (v) 3.0 3.6 3.4 3.2 001aam102 1.90 v pass (v) 1.55 1.60 1.65 1.70 1.75 1.80 1.85 20 a 100 a 2 ma 4 ma v cc (v) 3.0 3.6 3.4 3.2 001aam103 1.90 v pass (v) 1.55 1.60 1.65 1.70 1.75 1.80 1.85 20 a 100 a 2 ma 4 ma fig 10. pass voltage versus supply voltage; t amb =25 ?c (typical) fig 11. pass voltage versus supply voltage; t amb =0 ?c (typical) v cc (v) 3.0 3.6 3.4 3.2 001aam104 1.90 v pass (v) 1.55 1.60 1.65 1.70 1.75 1.80 1.85 20 a 100 a 2 ma 4 ma v cc (v) 3.0 3.6 3.4 3.2 001aam105 1.90 v pass (v) 1.55 1.60 1.65 1.70 1.75 1.80 1.85 20 a 100 a 2 ma 4 ma
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 8 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables fig 12. pass voltage versus supply voltage; t amb = ? 40 ?c (typical) v cc (v) 3.0 3.6 3.4 3.2 001aam106 1.90 v pass (v) 1.55 1.60 1.65 1.70 1.75 1.80 1.85 20 a 100 a 2 ma 4 ma
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 9 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 9.3 on resistance [1] typical values are measured at t amb =25 ? c and nominal v cc . [2] measured by the voltage drop between the a and b terminals at the indicated current through the switch. on-state resistance is determined by the lower of the voltages of the two (a or b) terminals. 9.4 on resistance test circuit table 7. resistance r on at recommended operating conditions; voltages are refe renced to gnd (ground = 0 v); for test circuit see figure 13 . symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ? c unit min typ [1] max min max r on on resistance v cc = 3.0 v to 3.6 v i sw =64ma; v i = 0 v - 3.7 7.0 - 10.0 ? i sw =24 ma; v i = 0 v - 3.7 7.0 - 10.0 ? i sw = 15 ma; v i = 1.2 v - 4.7 10.0 - 12.0 ? r on =v sw / i sw . fig 13. test circuit for measuring on resistance (one switch) 001aam034 nan noe v il nbn gnd v cc v l v sw i sw v
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 10 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 10. dynamic characteristics [1] all typical values are measured at t amb =25 ? c and at nominal v cc . [2] the propagation delay is the calculated rc time constant of the on-state resistance of the switch and the load capacitance, when driven by an ideal voltage source (zero output impedance). [3] t pd is the same as t plh and t phl . [4] t en is the same as t pzh and t pzl . [5] t dis is the same as t phz and t plz . 11. waveforms table 8. dynamic characteristics gnd = 0 v; for test circuit see figure 16 symbol parameter conditions t amb = ? 40 ? c to +85 ? c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max t pd propagation delay nan to nbn or nbn to nan; see figure 14 [2] [3] v cc = 3.0 v to 3.6 v - - 0.11 - 0.22 ns t en enable time noe to nan or nbn; see figure 15 [4] v cc = 3.0 v to 3.6 v 1.5 2.8 5.0 1.5 6.0 ns t dis disable time noe to nan or nbn; see figure 15 [5] v cc = 3.0 v to 3.6 v 0.8 3.1 7.0 0.8 8.0 ns measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 14. the data input (nan, nbn) to output (nbn, nan) propagation delay times 001aak881 v m v m v m v m v i nan, nbn input gnd v oh nbn, nan output v ol t phl t plh table 9. measurement points supply voltage input output v cc v m v i t r = t f v m v x v y 3.0 v to 3.6 v 0.5v cc v cc ? 2.0 ns 0.9 v v ol +0.15v v oh ? 0.15 v
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 11 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 15. enable and disable times aaa-000029 v i v m t plz t phz t pzh t pzl v x v y v m v m outputs enabled outputs disabled outputs enabled v m v ol v oh gnd noe input gnd 1.8 v output low to off off to low output high to off off to high
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 12 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables test data is given in table 10 . definitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 16. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l g table 10. test data supply voltage load v ext v cc c l r l t plh , t phl t pzh , t phz t pzl , t plz 3.0 v to 3.6 v 30 pf 1 k ? open gnd 3.6 v
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 13 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 11.1 additional dynami c characteristics [1] typical values are measured at t amb =25 ? c and v cc = 3.3 v. [2] f i is biased at 0.5v cc . 11.2 test circuits table 11. additional dynamic characteristics at recommended operating conditions; voltag es are referenced to gnd (ground = 0 v); v i = gnd or v cc (unless otherwise specified); t r = t f ?? 2.5 ns. symbol parameter conditions t amb = 25 ?c unit min typ max f ( ? 3db) ? 3 db frequency response v cc =3.3v; r l =50 ? ; see figure 17 [2] -575-mhz noe connected to gnd; adjust f i voltage to obtain 0 dbm level at output. increase f i frequency until db meter reads ? 3db. fig 17. test circuit for measuring the frequency response when channel is in on-state aaa-000028 v cc v il f i 0.5 v cc r l gnd db noe nan nbn
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 14 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 12. package outline fig 18. package outline sot724-1 (ssop20) unit a 1 a 2 a 3 h e l p b p cd (1) e (1) z (1) el y wv references outline version european projection issue date iec jedec jeita mm 0.25 0.10 1.55 1.40 0.25 0.31 0.20 0.25 0.18 8.8 8.6 4.0 3.8 0.635 1 6.2 5.8 0.89 0.41 1.67 1.28 8 0 o o 0.18 0.25 0.1 dimensions (millimetre dimensions are derived from the original inch dimensions) note 1. plastic or metal protrusions of 0.2 mm maximum per side are not included. sot724-1 01-07-04 03-02-18 w m b p d h e e z e c v m a x a y 1 10 20 11 a a 1 a 2 l p detail x l (a 3 ) mo-137 0 2.5 5 mm scale ssop20: plastic shrink small outline package; 20 leads; body width 3.9 mm; lead pitch 0.635 mm sot724-1 a max. 1.73 1/2 e
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 15 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables fig 19. package outline sot360-1 (tssop20) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.5 0.2 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot360-1 mo-153 99-12-27 03-02-19 w m b p d z e 0.25 11 0 20 11 pin 1 index a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm sot360-1 a max. 1.1
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 16 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables fig 20. package outline sot764-1 (dhvqfn20) terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 4.6 4.4 d h 3.15 2.85 y 1 2.6 2.4 1.15 0.85 e 1 3.5 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot764-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot764-1 dhvqfn20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 29 19 12 11 10 1 20 x d e c b a terminal 1 index area ac c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1) 02-10-17 03-01-27
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 17 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 13. abbreviations 14. revision history table 12. abbreviations acronym description cdm charged device model cmos complementary metal-oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model ttl transistor-transistor logic table 13. revision history document id release date data sheet status change notice supersedes 74cbtlvd3244 v.1 20110715 product data sheet - -
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 18 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 15.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 15.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? 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stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74cbtlvd3244 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 15 july 2011 19 of 20 nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from national authorities. 15.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74cbtlvd3244 8-bit level-shifting bus switch with 4-bit output enables ? nxp b.v. 2011. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 15 july 2011 document identifier: 74cbtlvd3244 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 functional description . . . . . . . . . . . . . . . . . . . 4 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 recommended operating conditions. . . . . . . . 5 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 9.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 9.2 typical pass voltage graphs . . . . . . . . . . . . . . . 7 9.3 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 9 9.4 on resistance test circuit . . . . . . . . . . . . . . . . . 9 10 dynamic characteristics . . . . . . . . . . . . . . . . . 10 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 11.1 additional dynamic characteristics . . . . . . . . . 13 11.2 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 15.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 15.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 16 contact information. . . . . . . . . . . . . . . . . . . . . 19 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

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